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Last modified: June 25, 2001
Timing Diagram Markup Language (TDML)

In March 1999, the Silicon Integration Initiative Inc. (Si2) formally "announced the release of the Timing Diagram Markup Language (TDML) v1.0, an open industry-standard language for the exchange of interactive timing diagrams for digital systems."

"TDML is being developed by the Electronic Component Information eXchange (ECIX) Working Group under the auspices of Si2. This standard will be used by ECIX PCIS-compliant datasheets for representation of timing and waveform diagrams that describe component and intellectual property (IP) characteristics. Members of the ECIX Working Group include Chronology Corporation, Denali Software Inc., IBM, Mentor Graphics/Interconnectix Business Unit and SynaptiCAD Inc.

"TDML is based on the eXtensible Markup Language (XML), which has been hailed as the "next generation" HTML for the Internet. EDA tool vendors adding support for TDML will benefit from the existing base of XML-related software; there are several freely available XML parsers which provide file validity checking and simplify the creation of TDML parsers. Component suppliers will benefit from TDML by allowing the use of one format to describe timing diagrams in both human- and machine-readable form. Design engineers will benefit from TDML during browsing functions where a timing diagram can be interactively changed to evaluate a component's design."


  • TDML web site

  • TDML Press release March 16, 1999. "Timing Diagram Markup Language 1.0 Released. Si2 and ECIX Accept 1.0 in XML."

  • "Electronic Component Information Exchange (ECIX)."

  • TDML Developer Tutorial. Suitable for developers using TDML. [cache]

  • TDML User Tutorial for users to TDML [cache]

  • TDML Documentation Set. Includes DTD and tag library. [cache]

  • Turbo Writer Pro. Product based on the TimingTool engine that is fully TDML compliant. "Turbo Writer Pro is a high performance HDL syntax directed source code and timing diagram editor running on the PC under Windows. It enables the semi-automatic generation of VHDL or Verilog, for both your design and test bench, offering a fast code development environment on the PC, fully compliant with the IEEE Standards for both languages. Turbo Writer Pro automatically generates HDL skeleton code - colour coded, line-numbered and indented - from a rich set of templates using the first two letters of the HDL Keyword followed by <TAB>. A graphical timing diagram editor allows the automatic generation of a test bench in either VHDL or Verilog for your design, and will extract structural data from existing code. Integration with Model Technology's ModelSim compiler allows compilation from within the editor, high-lighting errors in the edit window - dramatically accelerating the compile-edit turn around time during syntactic debug..." [Update from Mark Olive 2002-12-04.]

  • [June 22, 2001] TimingTool [Online Free TDML editor]. "TimingTool is a completely FREE graphical timing diagram editor that has been written to conform completely to the TDML stanard. TimingTool saves diagram information always in TDML. The GUI is written in Java and will run as an applet from any of the modern web browsers. The saved TDML can be translated into VHDL and Verilog. Documentation translators are also provided that allow TDML to be read into any of the popular word processors or graphics packages." [Note from Paul Chaffey

  • [April 5, 1999] "Chronology Accelerates TDML Adoption." - "Efforts to encourage widespread adoption of a standard Timing Diagram Markup Language (TDML) for exchange of timing information received a major boost today from Chronology Corporation. The company announced it will make available a free version of its industry-leading TimingDesigner tool, called TimingViewer, that supports TDML v1.0, released March 15, 1999 by the Silicon Integration Initiative, Inc. (Si2). The company today also announced the availability of TimingDesigner 5.0 with support for TDML as well as other enhancements."

  • "TDML: An XML-based Interchange Standard for Waveforms and Timing Specifications." By Donna Mitchell. From ECN Magazine, November 1998. "One of the most serious problems facing engineers during the creation of digital systems is the interchange of design and test data between different EDA tools and test systems. Frequently, data entered or produced at one stage of development must be completely discarded and manually re-entered because no exchange mechanism exists for converting data produced in one tool's format into a form acceptable to other tools. This problem is most evident in the variety formats for representing digital waveform and timing information. Waveform and timing parameter data is produced and distributed in many incompatible forms: timing diagrams in printed data sheets, test vector stimulus, tester pattern files, static timing analyzer reports, simulation dump files, logic analyzer data, etc. Each format has its own syntax and content requirements, generally preventing the exchange of even simple waveforms. Ad hoc converters have been written by many engineers to translate between individual formats, but due to the lack of a standardized intermediate format, this has meant a new set of translators must be written every time a new format is introduced in a design flow. To address this problem, an interchange format called Timing Diagram Markup Language (TDML) has been created that contains a superset of the information found in existing waveform and timing formats. TDML stores this data in a structured form that makes it easy for EDA tools and translators to extract only the portions of the data they need. TDML is also a human readable format, simplifying the creation and testing of TDML reader and writer programs..."

  • [May, 1999] "OLE-Enabled DataSheet Pro Simplifies Timing Diagram Management. SynaptiCAD's new DataSheet Pro targets Documentation Professionals." - "SynaptiCAD's new DataSheet Pro promises to provide documentation professionals with a more efficient environment for the management of documents containing multiple timing diagrams. The product uses Object Linking and Embedding (OLE) to provide immediate in-place editing of timing diagrams. Other features include style sheets, view support, direct web file generation, project management, and support for the industry-standard Timing Diagram Markup Language (TDML) format. Documentation professionals will be able to receive timing diagrams produced by design engineers using any TDML-compatible product, such as WaveFormer Pro or Timing Diagrammer Pro, and embed them directly into documentation programs like FrameMaker and Word."

  • [March 08, 1999] "Lucent Technologies Joins Si2 ECIX Project. PTAB Accepts New Customer Advisory Board Proposal, Moves to XML." - "Silicon Integration Initiative Inc. (Si2), an industry organization that provides synergistic multi-company engineering services, today announced that Lucent Technologies has joined industry leaders, Hewlett-Packard, Hitachi, IBM, Intel, Philips Semiconductors, Motorola, and Texas Instruments on the Project Technical Advisory Board (PTAB) of the Electronic Component Information Exchange (ECIX) project. Another important decision made by the PTAB is that all ECIX specifications will become XML-compliant in 1999. The impact of the Internet on the business world has been very large, and is still growing. Many users of the Internet are preparing for adoption of the emerging eXtensible Markup Language (XML) suite of standards in the near term. The ECIX team also believes that XML will play a large role in Internet component information transfer and related applications development, and has therefore adopted XML in all ECIX specifications. This includes the Component Information Dictionary Specification (CIDS), the Timing Diagram Markup Language (TDML) Specification, as well as PCIS and the new PCIS-based specification for Quick Reference Data." See further information in "Electronic Component Information Exchange (ECIX)." [announcement from Si2]

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